Portable electronic devices, such as mobile phones, PDAs, DVCs and DSCs, are gaining increasing sophistication in functions and features. And to be accepted by the market, they have to be smaller in size and lighter in weight, and for the realization thereof, there is a growing demand for highly-integrated system LSIs. On the other hand, these electronic devices are desired to be easier or handier to use, and therefore the LSIs used in those devices are required to be more functionally sophisticated and better performing. For this reason, the higher integration of LSI chips is causing increases in I/O count, which in turn generates demand for smaller packages. To satisfy both these requirements, it is strongly desired that semiconductor packages suited for the high board density packaging of semiconductor components be developed. To meet such needs, a variety of packaging technologies called CSP (Chip Size Package) are being developed.
In CSP, a semiconductor module can be fixed onto a packaging board in a size practically the same as an LSI chip. This helps realize the miniaturization of the packaging board on which CSP is mounted. Thus, the use of CSP enables the electronics equipment and the like to be made smaller in size in its entirety.
A method of manufacturing semiconductor modules of such a CSP type has been proposed as follows (See Patent Document 1) as a method to reduce the number of processes. In other words, this method is such that semiconductor constructions having external connection electrodes are first arranged on a base plate in such a manner as to be mutually apart slightly from each other, and an insulating layer is formed in a periphery-side surface of the semiconductor constructions. Then, the semiconductor constructions and the insulating layer are covered with an insulating film, and a metallic plate having bump electrodes is disposed on the insulating film. Then, the bump electrodes are connected to the external connection electrodes by having the bump electrodes bite into the insulating film. After this, a rewiring is formed by patterning the metallic plate, thereby completing the fabrication of the semiconductor module.    [Patent Document 1] Japanese Unexamined Patent Publication No. 2004-349361.